The group of bits 11001 is serially shifted (right-most bit first) into a 5-bit parallel output shift register with an initial state 01110. After three clock pulses, the register contains ________
A. 01110
B. 00001
C. 00101
D. 00110
A. 01110
B. 00001
C. 00101
D. 00110
The correct choice is C. 00101
LSB bit is inverted and feed back to MSB:
01110 – initial
10111 – first clock pulse
01011 – second
00101 – third.
LSB bit is inverted and feed back to MSB:
01110 – initial
10111 – first clock pulse
01011 – second
00101 – third.